Digital Design Verification Engineer
- Job Title
- Digital Design Verification Engineer
- Job ID
- 27647633
- Location
- Valencia, SPAIN, ES-V 46022
- Other Location
- Description
-
Our multinational semiconductor client, a leading worldwide supplier of high performance optical sensors is in search of a:
Digital Design Verification EngineerRoles and responsibilities
- Verification of integrated mixed signal and digital blocks and CMOS IC’s
- Creation of verification plans for complex mixed signal or digital devices
- Development of verification environment and ensure proper verification coverage for enabling bug free silicon manufacturing.
- Creation of DV test cases and debugging of simulation results
- Design of digital blocks at RTL level and addition of DfT concept onto the design. Creation and patenting of new IP
- Synthesis and timing sign-off for on-silicon implementation
Education/Experience
- University degree in Electronics or related
- 5+year experience in digital design/verification with hands-on experience on relevant design/simulation tools
- Knowledge of design verification methodologies, tools and languages (UVM, SystemVerilog, assertions …)
- Knowledge of RTL design with HDL (Verilog/VHDL) for integrated devices. Hands-on experience with FPGA is a plus.
- Knowledge of backend flow tools for design synthesis, timing sing-off and power analysis
- Analytical mind for solving complex problems and debugging design issues popping up in simulations
- Team oriented, committed to deadlines and development discipline
- Communication skills and proficiency in English
- Required Skills
-
university degree in the electronic engineering field
5+year experience in digital design/verification
design verification methodologies, tools & languages (UVM, SystemVerilog, assertions …)
English fluency
- Openings
- 2
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