ForwardEdge ASIC

Analog Layout Engineer (Mid-Level)

Job Title
Analog Layout Engineer (Mid-Level)
Job ID
27744047
Work Hybrid
Yes
Location
SAINT PAUL, MN, 55108  Hybrid
Other Location
Description
Summary: ForwardEdge ASIC is seeking skilled and detail-oriented ASIC Analog Layout Engineers to join our talented team. The successful candidates will be responsible for the physical implementation of analog/mixed-signal circuits within ASIC designs. This role involves collaborating closely with ASIC design engineers to translate schematic-level designs into robust layouts that meet performance, area, and manufacturability requirements.
Key Responsibilities:
Appropriate-level experience, knowledge, and scope of responsibility in analog integrated circuit layout.  May include the following areas:
  • Designing complex layout for mixed signal, and analog circuits in deep sub-micron CMOS technologies
  • Reviewing and analyzing floorplans and complex circuits with circuit designers.
  • Working with circuit designers to plan work and negotiate any necessary layout tradeoffs.
  • Interpreting LVS, DRC and ERC reports to find efficient ways to complete layout.
  • Experience working closely with the circuit design team.
  • Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent performance, area and power requirements.
  • Implementing analog layouts to achieve specific attributes such as tight matching, low noise, and low power consumption. Layouts may include amplifiers, oscillators, data converters, voltage regulators, and I/O cells.
  • Custom and standard cell-based floor-planning and hierarchical layout assembly.
  • Understanding techniques for managing IR drop, RC delay, electromigration, self-heating and coupling capacitance.
  • Recognizing and preventing failure prone circuit and layout structures
  • Analog and DFM best practices
  • Excellent communication skills and able to work with cross-functional teams.
  • Stay updated with industry trends, best practices, and advancements in layout tools and methodologies.

Qualifications:
  • Bachelors degree in electrical engineering or related field.
  • Analog/custom layout experience in analog/mixed-signal CMOS circuits in deep sub-micron technologies (5 – 40 nm) for high-speed interfaces.
  • Experience with high-speed layouts using FINFET technologies.
  • Working knowledge of ESD and latch-up solutions is desired.
  • Clearance: This position requires the ability to obtain a US government security clearance.

Work Environment: The work environment for this role typically involves office-based activities with collaboration with analog design, CAD, and physical verification teams.
Benefits:
  • Work-life balance: Flexible 9/80 work schedules with every other Friday off, hybrid work with primary location being in St. Paul, MN
  • Competitive benefit package: Including options for healthcare and medical coverage, 401K Retirement Benefits with company contribution, as well as a generous holidays and PTO allotment. Selected candidate may also be eligible for short-term and long-term incentives.

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